april 2001 2001 fairchild semiconductor corporation fdd663 0a rev d (w) FDD6630A 30v n - channel powertrench mosfet general description this n - channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional switching pwm controllers. it has been opt imized for low gate charge, low r ds( on) and fast switching speed. applications dc/dc converter motor drives features 21 a, 30 v r ds(on) = 35 m w @ v gs = 10 v r ds(on) = 50 m w @ v gs = 4.5 v low gate charge (5nc typical) fast switching high performance tr ench technology for extremely low r ds(on) . g s d to-252 s g d absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain - source voltage 30 v v gss gate - source voltage 20 v i d drain current ? continuous (note 3) 21 a ? pulsed (note 1a) 100 power dissipation (note 1) 28 (note 1a) 3.2 p d (note 1b) 1.3 w t j , t stg operating and storage junction temperature range ? 55 to +175 c thermal characteristics r q jc thermal resistance, junction - to - case (note 1) 4.5 c/w r q ja thermal resistance, junction - to - ambient (note 1a) 40 c/w r q ja thermal resistance, junction - to - ambient (note 1b) 96 c/w package marking and ordering information device marking device re el size tape width quantity FDD6630A FDD6630A 13?? 16mm 2500 units FDD6630A
FDD6630A rev. d (w) ) on ( ds d r p electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units drain - source avalanche ratings (note 2) w dss drain - source avalanche e nergy single pulse, v dd = 15 v 55 mj i ar drain - source avalanche current 7 .6 a off characteristics bv dss drain ? source breakdown voltage v gs = 0 v, i d = 250 m a 30 v d bv dss d t j breakdown voltage temperature coefficient i d = 250 m a, referenced to 25 c 23 mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 m a i gssf gate ? body leakage, forward v gs = 20 v, v ds = 0 v 100 na i gssr gate ? body leakag e, reverse v gs = ? 20 v, v ds = 0 v ? 100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 m a 1 1.7 3 v d v gs(th) d t j gate threshold voltage temperature coefficient i d = 250 m a, referenced to 25 c ? 4 mv/ c r d s(on) static drain ? source on ? resistance v gs = 10 v, i d = 7.6 a v gs = 4.5 v, i d = 6.3 a v gs = 10 v, i d = 7.6 a, t j = 125 c 28 40 44 35 50 58 m w i d(on) on ? state drain current v gs = 10 v, v ds = 5 v 20 a g fs forward transconductance v ds = 5 v, i d = 7 .6 a 13 s dynamic characteristics c iss input capacitance 462 pf c oss output capacitance 113 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 40 pf switching characteristics (note 2) t d(on) turn ? on delay time 5 11 ns t r turn ? on rise time 8 17 ns t d(off) turn ? off delay time 17 28 ns t f turn ? off fall time v dd = 15 v, i d = 1 a, v gs = 10 v, r gen = 6 w 13 24 ns q g total gate charge 5 7 nc q gs gate ? source charge 2 nc q gd gate ? drain charge v ds = 15 v, i d = 7.6 a, v gs = 5 v 1.4 nc drain ? source diode characteristics and maximum ratings i s maximum continuous drain ? source diode forward current 2.7 a v sd drain ? source diode forward voltage v gs = 0 v, i s = 2.7 a (note 2) 0.8 1.2 v notes: 1. r q ja is t he sum of the junction - to - case and case - to - ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. a) r q ja = 40c/w when mounted on a 1in 2 pad of 2 oz copper scale 1 : 1 on letter size paper b) r q ja = 96c/w when mounted on a minimum pad. 2. pulse test: pulse width < 300 m s, duty cycle < 2.0% 3. maximum current is calculated as: where p d is maximum power dissipation at t c = 25c and r ds(on) is at t j(max) and v gs = 10v. package current limitation is 21a FDD6630A
FDD6630A rev. d (w) typical characteristics 0 10 20 30 40 0 1 2 3 4 5 v ds , drain-source voltage (v) i d , drain current (a) 4.0v 3.0v 3.5v 4.5v v gs = 10v 5.0v 6.0v 0.5 1 1.5 2 2.5 3 0 5 10 15 20 25 30 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 3.0v 4.0v 3.5v 10v 4.5v 5.0v 6.0v figure 1. on - region characteristics. figure 2. on - resistance variation with drai n current and gate voltage. 0.6 0.8 1 1.2 1.4 1.6 1.8 -50 -25 0 25 50 75 100 125 150 175 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 7.6a v gs = 10v 0 0.03 0.06 0.09 0.12 0.15 0.18 2.5 3 3.5 4 4.5 5 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 3.8 a t a = 125 o c t a = 25 o c figure 3. on - resistance variation with temperature. figure 4. on - resistance variation with gate - to - source voltage. 0 5 10 15 20 25 1 2 3 4 5 v gs , gate to source voltage (v) i d , drain current (a) t a = -55 o c 25 o c 125 o c v ds = 5v 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v f igure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. FDD6630A
FDD6630A rev. d (w) typical characteristics 0 2 4 6 8 10 0 2 4 6 8 10 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 7.6a v ds = 5v 15v 10v 0 100 200 300 400 500 600 700 0 5 10 15 20 25 30 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. c apacitance characteristics. 0.01 0.1 1 10 100 1000 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 10s 1s 100ms r ds(on) limit v gs = 10v single pulse r q ja = 96 o c/w t a = 25 o c 10ms 1ms 100 m m s 0 10 20 30 40 0.1 1 10 100 1000 t 1 , time (sec) p(pk), peak transient power (w) single pulse r q ja = 96c/w t a = 25c figure 9. maximum safe operating area. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 r(t), normalized effective transient thermal resistance r q ja (t) = r(t) + r q ja r q ja = 96 c/w t j - t a = p * r q ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design. FDD6630A
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